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Abstract Papertronics introduce a sustainable, cost‐effective revolution in electronics, especially for the Internet of Things. This research overcomes the traditional challenges of paper's porosity, which has impeded electronic component fabrication and performance. A novel approach that harnesses paper's natural capillary action, combined with hydrophobic wax patterning, to achieve precise vertical integration of electronic components is introduced. This method marks a significant departure from conventional surface deposition techniques. This study demonstrates the successful creation of tunable resistors, capacitors, and field‐effect transistors, embedded within a single sheet of paper. Contrary to previous assumptions that impeded the use of paper, its rough and porous texture as a strategic advantage, facilitating the precise fabrication of intricate electronic components is leveraged. Machine learning algorithms play an important role in predicting and enhancing the performance of these papertronic components. This innovation facilitates the development of compact printed circuit boards with increased circuit density, enabling the integration of diverse analog and digital circuits in either single or multi‐layer paper formats. The resulting papertronic systems exceed performance benchmarks, offering eco‐friendly disposal through biodegradability or incineration. These breakthroughs establish papertronics as a feasible, eco‐friendly alternative in the electronics industry, permitting widespread adoption and continuous innovation in sustainable electronic solutions.
Rafiee et al. (Wed,) studied this question.