Key points are not available for this paper at this time.
The Ising machine (IM) has emerged as a promising tool for tackling nondeterministic polynomial-time hard combinatorial optimization problems in real-world applications. Among various types of IMs, optoelectronic IMs based on electro-optical (EO) modulators stand out as an impressive platform for Ising computations. They offer a simple and stable architecture, with the EO modulator providing a natural inline nonlinear transfer function for the Ising model. However, integrated optoelectronic IMs have not been demonstrated until now, and exploring large-scale computations within the constraints of digital hardware resources remains an open challenge for these systems. In this paper, an integrated optoelectronic IM based on a thin-film lithium niobate (TFLN) photonic chip is presented, in conjunction with a sparse matrix–vector multiplication algorithm embedded in a field-programmable gate array that optimizes hardware resource utilization and minimizes computational latency. This setup allows us to solve multiple types of MAX-CUT problems with up to 2048 spins and achieve a remarkably low iteration latency of 1.78 μs. To further address the constraints posed by digital devices when tackling larger-scale Ising problems, we extend the application of the TFLN chip to yet another new scheme in which the single, compact on-chip modulator concurrently performs operations of linear multiplication and nonlinear transformation. This scheme demonstrates the capability to address large-scale MAX-CUT problems involving up to 16,384 spins, which, to the best of our knowledge, are the largest-scale problems solved on an on-chip IM, highlighting its potential to overcome digital limitations. The TFLN-based optoelectronic IMs provide a compact solution with high scalability for potentially practical applications in addressing complex combinatorial optimization problems.
Li et al. (Fri,) studied this question.