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Abstract As transistors are scaled to smaller dimensions their static power increases. Combining two-dimensional (2D) channel materials with complementary metal–oxide–semiconductor (CMOS) logic architectures could be an effective solution to this issue due to the excellent field-effect properties of 2D materials. However, 2D materials have limited polarity control. Here, we report a pseudo-CMOS architecture for sub-picowatt logic computing that uses self-biased molybdenum disulfide transistors. The transistors have a gapped channel that forms a tunable barrier — thus circumventing the polarity control of 2D materials — and exhibit a reverse saturation current below 1 pA with high reliability and endurance. We use the devices to make homojunction-loaded inverters with good rail-to-rail operation at a switching threshold voltage of around 0.5 V, a static power of a few picowatts, a dynamic delay time of around 200 µs, a noise margin over 90%, and a peak voltage gain of 241. Additionally, fundamental gate circuits based on this pseudo-CMOS configuration are fabricated by integrating more devices.
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Yue Zhang
Xiaofu Wei
Xiankun Zhang
University of Science and Technology Beijing
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Zhang et al. (Thu,) studied this question.
www.synapsesocial.com/papers/68e67ba3b6db6435876058af — DOI: https://doi.org/10.21203/rs.3.rs-2502301/v1
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