Fault-aware routing approach tailored for mesh-based NOC architechture using BIST and Virtual Channel routing algorithms

Network-on-Chip (NoC) architectures have emerged as a promising solution for handling the communication demands in modern system-on-chip designs. However, the reliability of NoC architectures is crucial for ensuring seamless operation in the presence of faults. This paper proposes a fault-aware routing approach tailored for mesh-based NoC architectures. The proposed approach aims to enhance the fault tolerance of the NoC by intelligently rerouting traffic to avoid faulty components while minimizing performance degradation. Leveraging fault detection mechanisms (BIST) and Virtual Channel-Based routing algorithms, the approach efficiently adapts to changing network conditions and ensures robust communication even in the presence of faults. Experimental evaluations demonstrate the effectiveness of the proposed fault-aware routing approach in improving the reliability and performance of mesh-based NoC architectures, making it a promising solution for future system-on-chip designs.