Approximate Triple Modular Redundancy Design Method Based on MOEA/D Algorithm

As electronic systems become increasingly complex and integrated, hardware cost and fault tolerance emerge as primary considerations. Approximate triple modular redundancy (ATMR) technology, while reducing hardware costs, provides an effective means to enhance the system's fault tolerance, enabling it to address hardware failures and abnormal conditions. Therefore, exploring more efficient design methods for ATMR holds high theoretical value and practical significance. Addressing challenges such as large area overhead and high error rates in ATMR, this paper proposes an ATMR design approach based on the Multi-Objective Evolutionary Algorithm with Decomposition (MOEA/D). The method primarily establishes a multi-objective optimization model for ATMR, considering the balance between area and error rate. The optimization objectives include minimizing the area and minimizing the error rate of ATMR. Experimental results indicate that, compared to methods based on MOOGA algorithms, the proposed approach achieves a certain level of improvement in solution quality while reducing the average computation time by 44.33%. This suggests that the proposed method can be applied to the optimization research of ATMR design.