In this study, a novel strategy for the formation of SiC gate oxide layers has been introduced through re-oxidation of a phosphorus-doped (P-doped) n-type silicon layer grown on SiC. This approach allows for the addition of controlled, low-dose P atoms at room temperature, thereby enabling a first-ever investigation into the impact of P-doping on the trap density distribution near the conduction band of SiC in the absence of carbon. The electrical properties of the P-doped oxide were compared with directly oxidized intrinsic silicon. The phosphorus treatment reduced the density of interface states from 4.03 × 1011 to 2.01 × 1010 cm−2 eV−1. Additionally, the findings of the study revealed a suppression of the flatband voltage hysteresis as a result of the P-doping treatment. Furthermore, the underlying mechanisms through which P-doping enhanced the interfacial performance have been explored in detail using atomic force microscopy, x-ray photoelectron spectroscopy, and first-principles calculations. The results indicated that this doping and re-oxidation method substantially optimized the elemental distribution and morphology of the SiC/SiO2 interface, thereby reducing defects near the interface.
Wang et al. (Mon,) studied this question.