Fully Integrated Memristive Spiking Neural Network with Analog Neurons for High-Speed Event-Based Data Processing

Abstract The demand for edge artificial intelligence to process event-based, complex data calls for hardware beyond conventional digital, von-Neumann architectures. Neuromorphic computing, using spiking neural networks (SNNs) with emerging memristors, is a promising solution, but existing systems often discard temporal information, demonstrate non-competitive accuracy, or rely on neuron designs with large capacitors that limit the scalability and processing speed. Here we experimentally demonstrate a fully integrated memristive SNN with a 128×24 memristor array integrated on a CMOS chip and custom-designed analog neurons, achieving high-speed, energy-efficient event-driven processing of accelerated spatiotemporal spike signals with high computational fidelity. This is achieved through a proportional time-scaling property of the analog neurons, which allows them to use only compact on-chip capacitors and train directly on the spatiotemporal data without special encoding by backpropagation through surrogate gradient, thus overcoming the speed, scalability and accuracy limitations of previous designs. We experimentally validated our hardware using the DVS128 Gesture dataset, accelerating each sample 50,000-fold to a 30 µs duration. The system achieves an experimental accuracy of 93.06% with a measured energy efficiency of 101.05 TSOPS/W. We project significant future efficiency gains by leveraging picosecond-width spikes and advanced fabrication nodes. By decoupling the hardware’s operational timescale from the data’s natural timescale, this work establishes a viable pathway for developing neuromorphic processors capable of high-throughput analysis, critical for rapid-response edge computing applications like high-speed analysis of buffered sensor data or ultra-fast in-sensor machine vision.