Investigation of Interface and Reliability of 3C- and 4H-SiC MOS Structures through Gate Dielectric Stacking and Post-Deposition Annealing

This study investigates the interface and reliability of metal-oxide-semiconductor capacitors (MOSCAPs) based on 3C-SiC and 4H-SiC using atomic layer deposition (ALD) and post-deposition annealing (PDA). SiO 2 and HfO 2 /SiO 2 were used as dielectric layers, with systematic PDA treatments conducted at 600°C, 900°C, and 1100°C in N₂ or forming gas (FG, a mixture of H 2 and N 2 ) environments to evaluate the impact of the PDA conditions on the interface characteristics of SiC MOSCAPs. The flat-band voltage for 3C-SiC MOSCAPs averaged at 0.68 ± 0.05 V for SiO 2 /3C-SiC/Si samples and 2.35 ± 0.01 V for HfO 2 /SiO 2 /3C-SiC samples when MOSCAPs annealed at 1100°C in FG. PDA in forming gas also significantly reduced hysteresis, dropping from 1.75 V to 0.18 V for SiO 2 /3C-SiC and from 2.49 V to 0.04 V for HfO 2 /SiO 2 /3C-SiC samples. For 4H-SiC MOSCAPs, as-deposited devices exhibited high oxide charges and poor interface quality. The average flat-band voltages for SiO 2 /4H-SiC were 9.01 ± 0.15 V, while HfO 2 /SiO 2 MOSCAPs showed 6.65 ± 0.02 V. After PDA at 1100°C, the flat-band voltage improved to-0.65 ± 0.035 V for SiO 2 /4H-SiC and-0.50 ± 0.05 V for HfO 2 /SiO 2 /4H-SiC. Additionally, hysteresis was reduced from 0.61 V to 0.15 V for SiO 2 /4H-SiC and from 0.23 V to 0.05 V for HfO 2 /SiO 2 /4H-SiC samples. We propose a figure of merit (FOM) which is defined as the ratio of the breakdown field to the product of flatband voltage shift, hysteresis effect, and density of interface states. The results demonstrate that PDA significantly enhances the interface quality and electrical characteristics of the MOS capacitors (MOSCAPs), with nitrogen (N 2 ) PDA yielding higher FOM for 4H-SiC stacks and forming FG PDA showing superior interfacial quality for 3C-SiC stacks.