A popular method for maximising power and performance in contemporary processors and System-on-Chip (SoC) designs is dynamic voltage and frequency scaling, or DVFS. It is widely used in modern processors and System-on-Chip (SoC) designs to balance power and performance. However, conventional DVFS controllers often struggle with highly dynamic workloads, rapid temperature changes, and process uncertainties. Since they depend on fixed threshold values andpredefined lookuptables, they tend to react slowly and can lead to unnecessary power consumption and lead to poor performance. So to avoid such limitations this paper proposes an AI-enabled adaptive DVFS controller using LMS-based prediction and FSM logic. At the same time, FSM states will ensure steady transitions between performance states and a real-time MATLAB environment is created to replicate the performance of FPGA-style AXI register behaviour, enabling cycle by cycle updationsimilar to hardware execution. This design is fully compatible with HDL coder, Vivado and AXI4- lite integration for FPGA implementation. Simulation results show that the predictor produces stable forecasts, the FSM responds smoothly with hysteresis, and the MATLAB real-time imitates closely resembles hardware operation. The proposed architecture offers intelligent and efficient DVFS control with very low computational overhead, making it practical for edge devices and power-sensitive SoCs.
NJ et al. (Wed,) studied this question.