A 64 Gb/s PAM-4 micro-ring modulation driver is fabricated in a 28 nm CMOS process. The design employs a digital based segmented DAC architecture to achieve high linearity. A nonlinear equalization circuit is implemented to compensate for both the dynamic and static nonlinearities inherent in the electro-optic conversion process. To improve energy efficiency, the number of digital slices is reduced through an optimized weighting scheme. Furthermore, signal bandwidth and integrity are enhanced by optimizing the clock distribution network and the 4:1 multiplexer structure. Enabled by the nonlinear compensation technique, the prototype delivers a clearly opened 64 Gb/s PAM-4 optical eye diagram.
Ma et al. (Thu,) studied this question.