Seeded topology optimization for commercial foundry integrated photonics

We present a seeded topology optimization methodology for integrated photonic devices fabricated on foundry platforms that yields improved performance compared to traditional topology optimization. We employ blurring filters and a design rule check correction algorithm to more readily meet fabrication constraints, resulting in devices with fewer artifacts and improved correlation between simulation and measurements. A statistical study is performed on a 2D modal multiplexer, revealing that 87% of devices optimized using this strategy conform to foundry constraints, compared to 13% of devices optimized using traditional TO. We apply seeded topology optimization to an ultra-compact TE modal multiplexer, a TE mode converter, a polarization rotator, and a high-contrast grating reflector. Using this optimization strategy, the measured insertion loss of the TE mode converter was reduced from 1.50 to 0.64 dB, and the measured TE1 insertion loss of the TE modal multiplexer was reduced from 3.95 to 1.38 dB over C-band. This approach enables a two-step inverse design process, merges physics-informed design strategies with inverse design, and ensures strict compliance with foundry constraints throughout optimization.