Simulation and Analysis of a Passive Uplink-Triggered Lte Jammer Using PLL Frequency Control

This study proposes the design and simulation of a low-power analog jammer that selectively targets LTE downlink signals based on real time uplink detection. The system architecture integrates a field strength detection unit, a PLL-controlled frequency sweeper, and a jamming signal generator using Zener-based noise injection and RF mixing via SA612A ICs. Simulations conducted in Proteus and MATLAB/Simulink validated the functional blocks, demonstrating accurate uplink detection, stable frequency synthesis, and effective jamming performance. Key results include spectral spreading between 21–33?dBJE, severe signal distortion, and bit-error rates exceeding 80% under interference conditions. While manual tuning and regulatory limitations constrain immediate deployment, the proposed solution offers a scalable foundation for controlled civilian use. The findings support future development of digitally enhanced, multi-band jamming systems tailored for educational or security-sensitive settings.