The increasing demand for high-performance computing, artificial intelligence, and advanced communication technologies has accelerated the development of compact, energy-efficient, and multifunctional three-dimensional heterogeneously integrated (3-DHI) microelectronics. While such integrated circuits offer significant improvements in functionality and integration density, the compact and vertical stacking of heterogeneous components introduce significant thermal challenges. These result in non-uniform power densities, hotspot proliferation, thermal expansion mismatch, and narrowing heat dissipation pathways-all of which compromise device reliability, longevity, and performance by hindering heat removal within the package and to the environment. This review critically examines the thermal bottlenecks inherent in 3-DHI architectures and evaluates the effectiveness of current thermal management strategies, including embedded microfluidic cooling, interlayer heat spreaders, and through-silicon vias. Additionally, the article outlines future research directions focused on overcoming existing limitations and advancing the development of thermally efficient 3-DHI chips.
Sharma et al. (Wed,) studied this question.