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August 1, 1998Open Access

A preliminary architecture for a basic data-flow processor

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Abstract

A processor is described which can achieve highly parallel execution of programs represented in dataflow form.

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Dennis et al. (Sat,) studied this question.

synapsesocial.com/papers/6a1f6971742cc02e70836ae1 https://doi.org/https://doi.org/10.1145/285930.286058

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Also Consider

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1A computer architecture for highly parallel signal processing1974 · 43 citations
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5A computation model with data flow sequencing1969 · 61 citations

Uma arquitetura preliminar para um processador básico de fluxo de dados | Synapse