Multilevel memristors are being developed for neuromorphic computing to overcome von Neumann architecture limitations, requiring atomic-scale scalability, high-speed operation, and energy-efficient reliability. Erasable conducting ferroelectric domain walls show unique functionality beyond bulk materials, enabling nanoscale multilevel information storage. In this study, the principle of a multilevel domain wall memory device is proposed using a LiNbO3 single-crystal film in atomistic smoothness integrated with the Si wafer after inhibiting the wall sideways motion within a step-like LiNbO3 cell in contact with two side electrodes. The confined domain switching within each step enables the programming of three distinct resistance states, showing conceptional multi-state memory at nanoscale. Efficient image convolution was performed through the construction of 3 × 3 arrays of the memory cells which served as a convolution kernel to enable rapid feature extraction, highlighting the potential of multilevel domain wall memory as a promising platform for the rapid expansion of deep learning.
Yu et al. (2025) studied this question.