This paper presents the design of a highly reconfigurable interdigital bandpass filter (BPF) developed through a three-stage design approach. In the first stage, the influence of four low-loss dielectric substrates on the filter response is systematically analyzed to identify the optimal configuration. The selected substrate demonstrates excellent performance, achieving an input return loss of −38 dB, an insertion loss of −0.9 dB at 4.30 GHz, and a wide passband corresponding to a bandwidth (BW) of 2.20 GHz. In the second stage, two variable capacitors were incorporated into the baseline geometry, enabling manual tuning of the center frequency (f0) from 5.10 to 6.34 GHz, with (S11) better than −25 dB and (S12) close to −0.60 dB. In the final stage, the capacitors were replaced by SMV1413 varactor diodes, transforming the design into a fully voltage-controlled tunable filter. This configuration provides continuous frequency agility from 4.70 to 5 GHz without modifying the physical structure, while achieving (S11) levels down to −40 dB and insertion loss as low as −0.7 dB. The proposed architecture offers a compact, low-loss, and electrically reconfigurable solution, making it a promising solution for next-generation RF front-ends, adaptive wireless systems, and cognitive radio applications. Two independent Electromagnetic solvers (EM) were employed to validate the filter’s performance: an EM based on the Finite Integration Technique and the Advanced Design System 2026 (ADS) solver using the Method of Moments (MoM). The close agreement between the results produced by both platforms confirms the accuracy and robustness of the proposed reconfigurable bandpass filter structure.
Guermal et al. (2026) studied this question.
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