Design of AHB to APB Bridge for Low Power Operation

The Advanced Microcontroller Bus Architecture (AMBA) is widely adopted in modern System-on-Chip (SoC) designs to support standardized high-performance interconnects. This work presents the design, functional verification, synthesis, and physical implementation of an ARM-compliant AHB-to-APB bridge that interfaces high-speed AHB masters with low-power APB peripherals. Post-verification, the design was synthesized using industry-standard EDA tools, meeting target timing, area, and power constraints. Physical design was carried out using a complete ASIC backend flow including floor planning, placement, clock tree synthesis, routing, and sign-off static timing analysis. The final layout passed connectivity and DRC checks, confirming manufacturability and structural correctness. The results demonstrate a fully functional, synthesizable, and physically realizable AHB-to-APB bridge suitable for integration in low-power embedded and SoC platforms.