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March 3, 2026Arabian Journal for Science and Engineering2 citations

Low Complexity, High-Performance Ternary Full Adder Using CNTFET Technology

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KDKm Umaira DilshadSHShams Ul HaqEAErfan Abbasian

Key Points

  • Existing circuit designs often struggle with efficiency in ternary logic, and this new approach shows promise.
  • The proposed full adder demonstrates a significant reduction in complexity while maintaining high performance metrics.
  • Analysis drawn from CNTFET technology enhances energy efficiency in emerging electrical circuits with lower power consumption.
  • Potential applications of this design may expand the capabilities of modern computing systems and integrated circuits.
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Cite This Study

Dilshad et al. (2026) studied this question.

synapsesocial.com/papers/69a75e2ec6e9836116a28958https://doi.org/10.1007/s13369-026-11068-6
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