PulseExploreJournal ClubDebatesTrendingResearchersJournals
Instagram
HomeExploreJournal ClubTrending
Synapse
⌘+K
Synapse
April 5, 2026Advanced Materials1 citations

Filled Carbon Nanotube Ternary Transistors

View Full Paper
YTYu TengJYJian YaoQWQinan Wang

Key Points

  • The study aims to address power consumption limitations in circuit integration through the development of ternary transistors using SWCNTs.
  • Developed a system with acetylacetonate metal molecules encapsulated in SWCNTs.
  • Modulated carrier concentration dynamically with an applied electric field.
  • Constructed ternary transistors to validate logic states 0, 1, and 2.
  • Achieved static power consumption of 8.2 pW.
  • Dynamic power consumption measured at 0.31 nJ (state 0 to 1) and 0.35 µJ (state 1 to 2).
  • Demonstrated uniform operation with rail-to-rail output capable of executing MVL operations.

Abstract

As circuit integration continues to advance, power consumption has become a critical bottleneck limiting further development. Multi-valued logic (MVL) has garnered extensive attention due to its potential to reduce interconnect complexity and switching losses. Single-walled carbon nanotubes (SWCNTs), with their superior electrical properties, ultra-small dimensions, and controllable aligned array growth, offer unique advantages for the large-scale fabrication of high-density MVL circuits. However, progress in this field using SWCNTs remains relatively lagging compared to two-dimensional materials, primarily due to device stability issues arising from challenges in precise doping control. Here, we demonstrate a system consisting of acetylacetonate metal molecules encapsulated within SWCNTs (M(acac)x@s-SWCNT), in which carrier concentration can be dynamically modulated under an applied electric field. Transistors based on this platform validate that this electric-field-controlled modulation yields three well-defined logic states: 0, 1, and 2. These transistors demonstrate good uniformity and stable operation, showing a static power consumption of 8.2 pW and dynamic power consumption of 0.31 nJ (state 0 to 1) and 0.35 µJ (state 1 to 2). The ternary inverter based on this heterostructure exhibits rail-to-rail output capability, enabling the accurate execution of MVL operations. Ternary weight networks (TWNs) built with these transistors reduce computational complexity and storage, enabling efficient neuromorphic computing.

Ask AI
Helpful
Bookmark
Share
View Full Paper

Cite This Study

Teng et al. (2026) studied this question.

synapsesocial.com/papers/69d1fd73a79560c99a0a387fhttps://doi.org/10.1002/adma.202523297
Ask AI
Helpful
Bookmark
Share
View Full Paper