With the rapid development of artificial intelligence (AI) and big data applications, the memory wall bottleneck inherent in traditional von Neumann architectures has become increasingly prominent. As a promising solution, computing-in-memory (CIM) technology tightly integrates computing and storage units, significantly reducing the energy consumption and latency associated with frequent data movement between memory and processors. This paper reviews recent advances in CIM technology from three perspectives: circuit design, architectural optimization, and application innovation. Key techniques such as mixed-signal computing and heterogeneous memory integration are analyzed at the circuit level. The evolution from integer-only to floating-point (FP) and hybrid integer-floating-point (INT-FP) computing paradigms is discussed at the architectural level. Optimization strategies for emerging scenarios, such as on-chip training and simultaneous localization and mapping (SLAM) or neural radiance field (NeRF)-based environmental modelling, are explored at the application level. The findings suggest that CIM technology is evolving from domain-specific accelerators toward general-purpose computing platforms, with the potential to reshape next-generation intelligent computing architectures.
Li et al. (Wed,) studied this question.