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The High Intensity Heavy-ion Accelerator Facility (HIAF), currently under construction, is a complex machine that couples a Continuous Wave (CW) superconducting ion Linear accelerator (iLinac) with a high-energy synchrotron to produce various stable and radioactive intense beams with energies from MeV/u to GeV/u. The machine has a versatile operation mode which requires a high flexibility and reliability to the Machine Protection System (MPS). A customized and robust MPS is designed and developed to give the readiness of the machine for operation, to mitigate and analyze faults related to the relative damage potential. To get a high speed and have a high level of reliability, all interlock signal processing is processed on radiation-tolerant Field-Programmable Gate Arrays (FPGA) with triple or dual redundancy, as well as with a fail-safe design. By implementing a multiprocessing platform system-on-chip FPGA, the HIAF MPS can be tightly integrated with other systems to maximize availability pinpoint failures for operations, and give the postmortem analysis. This paper will describe the architecture of the interlocks linking the protection systems, the strategies to manage the complexity, the detailed components, and the interlock logic of the customized HIAF MPS, as well as the test and verification of the prototype.
Wei et al. (Thu,) studied this question.