In‐plane ferroelectrics enabling reduced hysteresis in monolayer MoS2 transistors

Abstract Two‐dimensional (2D) semiconductors, such as monolayer MoS 2 , has emerged as a profound material platform in the post‐Moore era due to their versatile applications for high‐performance transistors, memories, photodetectors, neuristors, and so on. Nevertheless, the inherent defects in these atomically thin materials have given rise to significant hysteresis in their field‐effect transistors (FETs), resulting in shifted threshold voltages and elevated power consumptions not only on single‐device levels but also at circuitry scales. We herein report that, by vertically integrating an in‐plane ferroelectric, NbOCl 2 , with monolayer MoS 2 FETs, the hysteresis in both the output and transfer curves of the latter can be greatly suppressed, which we attribute to compensated electromigration currents by the polarization currents of the 2D ferroelectric. This work opens a new avenue to hysteresis‐free 2D transistors without necessitating defect‐free channels, thus allowing for their use in high driving‐voltage scenarios such as power electronics.