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Abstract We present the implementation of the indirect voltage measurement using a noise distribution algorithm 1 in the prototype application-specific integrated circuit (ASIC) SMAUGND₁ designed in CMOS 28 nm technology. The chip implements the matrix of 7×7 pixels with the size of 68×68 μm. Each pixel contains eight independent comparators implementing the described algorithm and optional correlated-double-sampling method. The paper describes the ASIC architecture and briefly presents preliminary test results and encountered problems.
Wegrzyn et al. (Mon,) studied this question.