Design of a fault‑tolerant‑metric‑aware, reversible n‑bit quantum arithmetic logic unit using IBM Qiskit

Quantum arithmetic and logic units (QALUs) are useful building blocks for reversible arithmetic subroutines, but broad-operation QALUs with explicit status outputs are rarely evaluated in a way that simultaneously emphasizes reversibility, reproducibility, hardware realism, and Clifford + T resource metrics. A reversible n-bit QALU implemented in Qiskit that supports 16 ALU-style operations is presented, including ADD, SUB, CMP, AND/OR/XOR and their negations, unary NOT, shifts, rotates, and operand passthrough, while preserving the input operands, writing the selected result to a separate result register, and emitting N, Z, C, V as well as EQ, LTu, LTs outputs. The implementation uses compile-time operation-specialized circuits rather than a runtime opcode-decoded super circuit, enabling clean verification and per-operation resource accounting. Exhaustive Aer verification at n = 4 covers all 256 input pairs for each of 16 operations (4096 cases total) and reports zero mismatches against a classical reference model. After decomposition to a Clifford + T-style basis, the arithmetic family (ADD, SUB, CMP) forms the dominant cost tier with T-count 86, CX-count 102–106, and depth 138 on the n = 4 instances, whereas logic and data-movement operations fall into lower-cost tiers. Hardware experiments on IBM Quantum are limited to n = 2 and use dynamical decoupling, gate twirling, and post hoc readout mitigation with mthree; the exhaustive 256-circuit campaign yields 91.41% raw correctness and 91.02% mitigated correctness, showing that suppression is useful, but that mitigation does not necessarily improve end-to-end accuracy at this scale. The contribution of the paper is therefore a reproducible Qiskit realization and evaluation framework for a flagged reversible QALU with Clifford + T-aware metrics, rather than a claim of a new asymptotically optimal arithmetic architecture.