Enhanced electrical performance of tellurium FETs via ultra-thin atomic-layer-deposited Al 2 O 3 interlayer for fermi-level de-pinning

In this study, we demonstrate that an atomic-layer-deposited Al2O3 dielectric interlayer uniformly covering both the channel and contact regions effectively reduces the Schottky barrier height (SBH) of tellurium (Te) field-effect transistors (FETs), providing a facile strategy to mitigate Fermi-level pinning. An ultrathin 3 nm Al2O3 interlayer inserted between the metal electrode and Te channel leads to significantly better electrical performance than that of Te FETs with channel-only Al2O3 passivation. Specifically, the drain current increases by a factor of 2.5, while the hysteresis window of the threshold voltage is reduced from 14.4 to 8.1 V. Transmission line measurements reveal a substantial decrease in contact resistance from 23.9 to 1.47 MΩ•μm, which is attributed to the reduction in SBH from 57.8 to 19.9 meV. These results highlight the importance of simultaneous channel and contact interface engineering and establish the Al2O3 interlayer as an effective approach for realising reliable p-type Te FETs.