ADAM-TPU: Rotation as a Shared Hardware Primitive for Analog LLM Inference

This paper presents a position and architecture proposal for ADAM-TPU, a non-von Neumann tensorial core optimized for Large Language Model (LLM) serving on a complex-polar analog substrate. We demonstrate that a single physical primitive—a programmable unitary rotation engine—underlies three otherwise separate problems in transformer optimization: rotary positional encoding (RoPE), inner-product-preserving similarity via Johnson-Lindenstrauss projections, and near-optimal KV-cache quantization. By combining a coherent photonic Mach-Zehnder interferometer (MZI) mesh for orthogonal rotations with a non-volatile memristive crossbar lattice for diagonal scaling, ADAM-TPU executes low-rank Singular Value Decomposition (SVD) factorizations in constant physical settling time. This unified approach directly resolves the traditional analog noise floor bottleneck (~6-8 bits); since rotation-based quantization algorithms achieve quality-neutral long-context retrieval at 2.5–3.5 bits per channel, the hardware error budget easily sits inside what the optical primitives provide for free. The architecture is paired with a static VLIW front-end, a recurrent low-rank context state, and a hardware-enforced measured-boot attestation layer for execution integrity. Known physical boundaries—including the ADC/DAC conversion wall, conductance drift, and the scale constraints of in-memory eigensolving—are systematically mapped in an explicit "Socratic Tail." Released under the Systemic Verification Engineering (S.V.E.) Meta-License v4.0 (share-alike).