Investigations of the Electrical Properties of Porous Silicon

We report capacitance and current‐voltage measurements of porous silicon in contact with sputter‐deposited aluminum. Three different substrates: 30–50 Ω‐cm boron‐doped (p−‐type), 0.01–0.03 Ω‐cm boron‐doped (p+‐type), and 0.003–0.005 Ω‐cm phosphorus‐doped (n+‐type) silicon, are used as starting material. Porous silicon formed from p−‐ and p+‐type substrates exhibits full‐ and partial‐carrier depletion, respectively. The electric field, potential distribution, and capacitance for full depletion are derived and shown to compare qualitatively with measured capacitance as a function of porous layer thickness for p−‐type porous silicon. Impedance variation with porous layer thickness was used to determine the resistivity of p−‐type porous silicon as . A three‐dimensional space‐charge region accounting for the observed partial depletion in p+‐type porous silicon is described in detail. Capacitance with bias was used to measure the effective interface area of p+‐type porous silicon. This reduced interface area can be explained in terms of a lateral depletion region surrounding each pore, with an average of 0.8 times the pore radius. Current‐voltage measurements indicate a blocking contact between sputtered aluminum and both p−‐ and p+‐type porous silicon, in contrast to ohmic contacts between sputtered aluminum and nonporous p−‐ and p+‐type silicon. Capacitance‐ and current‐voltage dependences of n+‐type silicon indicate that in this material conversion to porous silicon has a relatively small effect.