The design of wave soldering pallets (WSPs) for Printed Circuit Boards (PCBs) used in electronic devices is a laborious process for humans. This study aims to analyze mental workload and human error to recommend interventions that improve the design process. A hierarchical task analysis (HTA) decomposed the tasks, and the NASA Task Load Index (NASA-TLX) evaluated the mental workload. The systematic human error reduction and prediction approach (SHERPA) and the Human Error Calculator (HEC) were also applied. The creation of blueprint drawings has the highest probability of human error. Recommendations, such as modifying and standardizing information for drawings, were provided.
Maldonado-Macías et al. (Sat,) studied this question.