Energy-efficient inertial sensor fusion on heterogeneous FPGA-fabric/RISC System on Chip

Energy efficiency is a major design goal for mobile and wearable devices. These kind of devices most often comprise System-on-Chip processor cores and further hardware accelerators. A novel heterogeneous hardware architecture introduced by various FPGA manufacturers consists of a programmable FPGA like structure and a common RISC processor core. For system designers this commercial architecture enables enhanced flexibility in partitioning of algorithmic tasks. The hardware demonstrator for auditory feedback of movements (sonification) captured by multiple inertial measurement units proposed in this paper bases on a heterogeneous Xilinx Zynq System-on-Chip processing core and a custom hardware accelerator. Energy efficiency is enhanced by utilizing the hardware accelerator for orientation estimation based on a Kalman filter algorithm. The evaluation furthermore explores the usability of High Level Synthesis tools based on a fixed-point software implementation. Moreover, the area and power consumption of hardware accelerator ASIC implementations based on a 40 nm TSMC library are evaluated.