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In this paper, we present a methodology for characterization and repair of signal degradation in through-silicon-vias (TSVs) in 3-D integrated circuits (ICs). The proposed structure can detect the signal degradation through TSVs due to resistive shorts in liner oxide and variations in resistance of TSV due to weak open and/or bonding resistance. For TSVs with moderate signal degradations, the proposed structure reconfigures itself as signal recovery circuit to maintain signal fidelity. This allows electrical repair of TSVs with moderate defects leading to better design yield and system functionality. This paper presents the design of the test and recovery structure and demonstrates their effectiveness through stand alone simulations as well as in a full-chip physical design of a 3-D IC.
Cho et al. (Fri,) studied this question.