Controller Hardware-in-the-Loop Validation of a DSP-Controlled Grid-Tied Inverter Using Impedance and Time-Domain Approaches

In this work, a controller hardware-in-the-loop (CHIL) simulation of a grid-connected three-phase inverter equipped with an LCL filter is implemented using a real-time digital simulator (RTDS) as the plant and a digital signal processor (DSP) as the control hardware. This work identifies and discusses the critical aspects of the CHIL implementation process, emphasizing the relevance of the control delays that arise from sampling, computation, and pulse width modulation (PWM), which also adversely affect system stability, accuracy, and performance. Time and frequency domains are used to validate the modeling of the system, either to represent large-signal or small-signal models. This work shows multiple representations of the system under study: the fundamental frequency model, the switched model, and the switched model controlled by the DSP, are used to validate the nonlinear model, whereas the impedance-based modeling is followed to validate the linear representation. The results demonstrate a strong correlation among the models, confirming that the delay effects are accurately captured in the different simulation approaches. This comparison provides valuable insights into configuration practices that improve the fidelity of CHIL-based validation and supports impedance-based stability analysis in power electronic systems. The findings are particularly relevant for wideband modeling and real-time studies in electromagnetic transient analysis.