Bidirectional Reusable Subcircuit Modeling and Hierarchical Synthesis of Analog/RF Circuits with ANNs

Design automation has long been applied to analog and radio-frequency (RF) integrated circuits to accelerate the design process. While relatively simple circuits, such as basic building blocks, can be efficiently optimized, applying automation to more complex tasks remains challenging. To address this limitation, divide-and-conquer methodologies have been employed to enable hierarchical optimization. However, the trade-off between efficiency and accuracy remains a major bottleneck, primarily due to the inevitable reliance on computationally expensive SPICE simulations to ensure sufficient accuracy during evaluation. In this context, this paper introduces a bidirectional hierarchical synthesis approach powered by artificial neural networks (ANNs). The proposed framework follows both top-to-bottom and bottom-to-top strategies during synthesis. System-level models significantly reduce synthesis time, while bottom-level subcircuits are not only synthesized individually but also modeled for potential reuse, so new solutions with different design specifications can be obtained without expensive SPICE iterations. To demonstrate the effectiveness of the approach, an 8-bit full-flash analog-to-digital converter (ADC) and an RF front-end receiver were synthesized. Results show that the proposed framework achieves the target designs of both ADC and receiver circuits within a short time, with an average accuracy of 95%. Even when accounting for sub-circuit optimization and model training, the overall computational cost remains considerably low, highlighting the flexibility and practicality of the approach. Moreover, once all the models have been obtained, the synthesis time for both circuits is less than one second.