ABSTRACT This comprehensive review presents heterogeneous integration strategies for neuromorphic electronics, aiming to eliminate the von Neumann bottleneck, with a focus on enabling in‐sensor computation. It provides the evolution trajectory of memristor devices and arrays—from theoretical grounding and physical implementation to promising integration schemes. The device‐level discussion encompasses internal integration approaches that leverage multidimensional materials to modulate switching dynamics and enable artificial synaptic behaviors. At the array level, diverse paradigms of heterogeneous integration strategies are investigated, including architectures of 1D, resistive randomaccess memory, transistor‐rram, memtransistor, and 3D crossbar arrays. Each architecture is evaluated based on its functional advantages, physical significance, and neuromorphic applicability in systems that include convolutional neural networks, spiking neural networks, and reservoir computing. Emphasizing the syncretic design of materials, devices, and circuits, the review illustrates how these strategies facilitate the fusion of sensing, memory, and computation, thereby overcoming limitations of conventional computing. Representative implementations, ranging from planar wafer‐scale arrays to vertical 3D‐integrated systems, demonstrate significant innovations in energy efficiency and adaptive control for complex computational parallelism. The review concludes by identifying key challenges in material compatibility, fabrication complexity, and energy management, while highlighting effective solutions and promising pathways toward scalable, high‐performance neuromorphic hardware for artificial general intelligence.
Shen et al. (Sun,) studied this question.