Circuit routing in Very Large Scale Integration (VLSI) design is essential for ensuring efficient and reliable electrical connections between various components on a chip. Traditional routing methods face significant challenges such as scalability, congestion, suboptimal routing paths, and adaptability to changing design constraints. To address these issues, a novel approach using Double Deep Reinforcement Learning (DdQL) is proposed for global routing, coupled with Exaggerated Crayfish Optimization (ExCrO) for loss-function optimization. DdQL leverages a learning-based approach to dynamically optimize routing, allowing it to scale effectively to handle large and complex VLSI designs. It adapts to changing design requirements and constraints by continuously learning and exploring different routing strategies, thereby optimizing routing paths for better performance. The ExCrO algorithm enhances the routing process by providing robust optimization of the loss- function, ensuring thorough exploration of the solution space and avoidance of local minima. The combined approach results in significant improvements in wire length, overflow, and overflow optimization rate and accomplished the values of 132, 0.7548 and 98.875 respectively.
Danesh et al. (Wed,) studied this question.