Low-Power Semiconductor Systems This cover concept illustrates how a microelectromechanical systems (MEMS) power-gating switch could control power delivery to CMOS logic blocks. In their Research Article (10.1002/aelm.202500668), Yong-Bok Lee, Jun-Bo Yoon, and co-workers develop a nano-gap MEMS switch optimized for power gating, featuring a 20 nm air gap and high-stiffness design that enable 0.95 Ω on-resistance, 30 ns switching time, and <100 fA leakage for future low-power semiconductor systems.
Kim et al. (Thu,) studied this question.