The improvements to the multi-port S-Parameter model in advanced 3D Foveros IC packages including base die, derived from comprehensive electromagnetic field solvers, aim to convert it into a broadband polynomial rational function model. This updated model shows a high level of accuracy in impedance analysis and effectively removes glitches in frequencies below 1MHz. These enhancements are carefully aligned for both precision and efficiency in power integrity simulations, covering impedance analysis in the frequency domain and transient analysis in the time domain. As a result, the multi-port S-Parameter model is smoothly integrated into power integrity and power delivery simulations using the HSPICE simulator. This integration also involves transforming it into a rational function model, which not only simplifies the model but also ensures passivity and causality. The use of parallel computing further boosts efficiency, reducing simulation run time by 50 times compared to directly using the IFFT of a multi-port S-parameter-based macromodel. The incorporation of parallel computing enhances overall efficiency, leading to a substantial reduction in simulation run time. Validation of the model’s effectiveness is carried out through three practical power delivery network design cases for next generation 3D packages for CPUs including Motherboard and Die models. In summary, this methodology contributes to improved simulation efficiency by minimizing correlation time, optimizing resource utilization, and ensuring precision in power delivery and integrity analyses.
Islam et al. (Wed,) studied this question.