This paper presents a novel, minimalist floating memristor emulator circuit designed for low-power biomedical analog front ends. The proposed topology requires only two dynamic threshold MOS (DTMOS) transistors and one capacitor, constituting one of the most compact memristor emulators reported. The circuit operates without static power consumption and exploits the body-effect coupling in DTMOS devices to generate a state-dependent resistance. Comprehensive simulation in a 0.18 μm CMOS process verifies core memristive characteristics: a frequency-dependent pinched hysteresis loop tunable via capacitance, non-volatile memory, and robustness across temperature and process variations. Experimental validation using a discrete CD4007-based prototype confirms the pinched hysteresis loop from 100 Hz to 800 kHz, with a maximum simulated operating frequency of 500 MHz. A comparative analysis demonstrates that the design achieves a favorable trade-off, simultaneously minimizing transistor count and power while providing floating operation and high-speed performance. These attributes make the emulator a compelling candidate for integration into adaptive, area and power constrained biomedical signal conditioning systems.
Imen Barraj (Thu,) studied this question.