In this study, an ultra-low-voltage operational transconductance amplifier (OTA) operating from a 0.3 V supply, designed in a 45 nm CMOS process, is presented. To overcome the severe headroom constraints, the design employs a bulk-driven differential input stage combined with a current-reuse strategy, effectively enhancing transconductance while operating all transistors in the subthreshold region. This approach enables a rail-to-rail input common-mode range. A multipath Miller zero cancellation compensation technique ensures stability. The resulting OTA achieves an open-loop gain of 44.2 dB and a remarkable common-mode rejection ratio (CMRR) of 87.5 dB, all while consuming 23.3 nW of power. With a gain–bandwidth product of 9.9 kHz, a power supply rejection ratio (PSRR) of 41.1 dB, and an input noise of 1.0 μV/√Hz, this design is highly suitable for energy-constrained, low-frequency applications such as biomedical sensor interfaces and IoT nodes.
Li et al. (Tue,) studied this question.
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