This paper proposes a millimeter-wave miniature on-chip bandpass filter (BPF) implemented using a 0.18 μm CMOS process. To address the issues of insufficient coupling capability, limited control of transmission zeros, and excessive chip area in traditional on-chip filters, a folded cross-interdigital coupling structure is proposed to enhance coupling efficiency and reduce size. The design incorporates metal–insulator–metal (MIM) capacitors to increase the coupling capacitance between resonators without increasing the area, and utilizes a defected ground structure (DGS) to modify the current distribution at the ground plane, generating additional transmission zeros to improve selectivity. An LC equivalent circuit model was established and verified through full-wave electromagnetic simulation, and the design was validated through chip fabrication and on-wafer measurements. The measurement results show an insertion loss of 3.36 dB and a fractional bandwidth of 49.1% at 32 GHz, with two transmission zeros. The core dimensions are 0.25 mm × 0.18 mm. This design achieves a good balance between miniaturization, selectivity, and insertion loss, making it suitable for millimeter-wave SoC applications.
Chung et al. (Tue,) studied this question.