Low-Power Model of PWM Generator on FPGA for Digital SignalProcessing and Green Communication

Introduction: Over the past few years, PWM techniques have been widely used in DSP applications and digital systems. The vital role of this PWM is to control power utilisation for devices such as LEDs and motors. Power consumption is controlled by adjusting the pulse width of the modulating signals. In DSP applications, the PWM signal can also control brightness, motor speed, and other parameters. PWM signals are crucial in fields such as digital communications, signal processing, and power electronics, where they play a vital role in controlling and managing devices. This paper explores the implementation of a PWM (Pulse Width Modulation) generator on an FPGA, aiming to support digital applications and promote energy-efficient, “green” communication. Methodology: The implementation is performed using VIVADO ISE, and power consumption results are targeted for two FPGAs: Zynq 7000 and Zynq Ultrascale+. Verilog HDL is used to write the PWM generator code. This research emphasises a novel capacitance-aware power optimisation context that systematically analyses power dissipation patterns across varying output load capacitances from 0 pF to 20 pF. Results: The experimental results demonstrate that power consumption increases exponentially with capacitance loading, with the Zynq-7000 showing a 104.73% power increase and the Zynq UltraScale+ exhibiting a 152.13% increase at maximum capacitance. The proposed framework contributes to sustainable digital design by providing quantitative guidelines for power-efficient PWM implementations in green communication systems. Discussion: For both FPGAs, as the output load capacitance increases from 0 pF to 20 pF, the power also increases. Additionally, for both FPGAs, the DP increases with increasing capacitance, while the SP declines. There is a 104.73% increase in TP for Zynq 7000 as the capacitance rises to 20 pf. The increase in Zynq Ultrascale+ is 152.13% as the capacitance increases to 20 pf. Conclusion: This work highlights how simple adjustments in components like capacitance can significantly reduce power usage, supporting greener technology and more efficient power management for modern digital applications.