ABSTRACT A 28 GHz in‐phase/quadrature (I/Q) up‐converter with high linearity is presented for 5G mobile communication systems. The proposed up‐converter consists of a 27 GHz class‐C quadrature voltage‐controlled oscillator (QVCO) with a high conversion gain double‐balanced mixer core. To improve the mixer's conversion gain, properly sized PMOS transistors are connected in parallel with the NMOS switching transistors. Furthermore, a symmetric layout is employed to enhance image and local oscillator (LO) rejection. Post‐layout simulation results demonstrate a conversion gain above 28.2 dB and an LO leakage of −57 dB, respectively. The proposed up‐converter achieves an output third‐order intercept point (OIP3) of 12.67 dBm and an output 1‐dB compression point (OP 1dB ) of 2.31 dBm, while consuming 19.2 mW from a 1.2‐V supply voltage. The proposed I/Q up‐converter occupies 0.64 mm 2 (703 μm × 905 μm) of chip area.
Ghasemi et al. (Thu,) studied this question.