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For the first time, we experimentally demonstrated a bit cost scalable (BiCS) 8-layer 3D vertical RRAM with ultimate scalability. The design of self-selective cell (SSC) with non-filamentary switching were successfully extended to 8 stacks and exhibits salient features, including high nonlinearity (>10 2 ), forming free and high endurance (>10 7 ). An extremely scaled 3D structure with 5 nm size and 4 nm vertical pitch was further demonstrated. The sub μA operation current is quite promising for low power applications, but not good for sensing speed. A fixed bitline voltage sensing circuit was proposed to address the latency issue. Sub-μs read latency in bit sensing mode was successfully achieved.
Luo et al. (Fri,) studied this question.