This paper introduces QESNN, a complete neuromorphic hardware–software pipeline that combines a novel quantum-inspired Spike-Timing-Dependent Plasticity (Q-STDP) learning rule with a synthesizable FPGA implementation to deliver practical, low-cost edge anomaly detection for industrial motors. Q-STDP uses persistent binary temporal traces to capture multi-spike correlations over extended windows, enabling richer temporal learning than classical pairwise STDP while remaining efficient and directly implementable in digital logic. We demonstrate a full end-to-end system: preprocessing converts IMAD sensor recordings to spike trains, training occurs offline, and a UART streaming pipeline performs real-time inference on a Sipeed Tang Nano 4K (2,124 LUTs used, ~46% utilization). Benchmarks following SNABSuite and NeuroBench report 92.12% classification accuracy, 4.10 ms mean latency, 265 mW power consumption, 246.3 samples/s throughput, perfect precision (100%), 0.869 F1 score, and 0.0014 mJ per inference — showing competitive performance with very low energy and hardware cost. QESNN demonstrates that event-driven spiking models with hardware-friendly learning rules can be practical for battery-powered predictive maintenance and other industrial IoT applications. The paper includes Verilog synthesis details, resource utilization tables, ablation studies quantifying the Q-STDP contribution, and discussion of limitations and future work (scalability, non-volatile weight storage, adaptive thresholds.
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