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The extreme volumetric power densities of 3D-stacked integrated circuits (3D-ICs) complicate thermal management by triggering non-Fourier, sub-diffusive heat transfer. The present work creates a framework for 3D thermal transport assessment within the annular cooling geometry, by using a fractional dual-phase lag approach to describe the thermal relaxation and sub-microsecond regimes. A high-precision hybrid spectral collocation marching method (HSCMM), based on the global Gauss–Lobatto–Legendre (GLL) grid, is developed to solve the nonlinear coupled fractional order and phase-lag dissimilarity equation with velocity profile. The developed solver shows a spectral accuracy in the convergence of the manifold. The results demonstrate a 27.10% improvement in the Performance Evaluation Criterion (PEC) in the presence of the fractional domain relative to the classical case. This work further proves that maximizing raw heat transfer is not always tantamount to thermodynamic efficiency. Notably, the sub-diffusive transport designs achieve up to 65.20% reduction in peak temperatures compared to the classical cooling baselines. These results offer a transformative design protocol for mitigating catastrophic thermal runaway in next-generation CMOS and high-density logic-on-memory architectures.
Oni et al. (Sat,) studied this question.