Design of a Double Gate Tunneling Field Effect Transistor (DG-TFET) and Performance Analysis

The Double-Gate Tunnel Field-Effect Transistor (DG-TFET) has emerged as a promising contender in modern semiconductor technology, offering distinct advantages over conventional devices. This paper delves into the pivotal performance metrics of DG-TFETs: sub-threshold slope (SS), ON current (Ion), and work function modulation, which collectively contribute to heightened device functionality.Sub-threshold slope, a critical parameter for energy efficiency, sees significant enhancement in DG-TFETs owing to their inherent ability to precisely control the tunneling barrier. The incorporation of dual gates enables precise tuning of the tunneling process, resulting in steeper SS values compared to traditional devices. This attribute is crucial in minimizing leakage currents during device operation, thus ensuring superior power efficiency.Additionally, the ON current of DG-TFETs serves as a vital indicator of their switching prowess. The dual-gate architecture facilitates enhanced electrostatic control, leading to heightened ON current levels. This aspect is pivotal for achieving faster switching speeds, thereby ensuring seamless integration into high-performance circuits.Work function modulation stands out as a key feature in DG-TFETs, facilitating tailored band alignments and improved device characteristics. Through independent adjustment of the work functions of the source and drain regions, the device can be finely tuned to optimize tunneling efficiency and overall performance. This capability holds significant implications for circuit design and customization, augmenting the versatility of DG-TFETs.In essence, the Double-Gate Tunnel Field-Effect Transistor presents a compelling avenue for advancing semiconductor technology. By addressing sub-threshold slope, enhancing ON current, and modulating work functions, DG-TFETs offer a promising solution for achieving higher energy efficiency, faster switching speeds, and versatile device optimization. As the semiconductor landscape continues to evolve, DG-TFETs hold substantial potential for shaping the future of integrated circuits and electronic devices.This study involves the design and evaluation of three distinct transistor configurations: a conventional Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET), a Single Gate Tunnel Field-Effect Transistor (TFET), and a Double Gate TFET. The mentioned devices are simulated using Silvaco TCAD (Technology Computer Aided Design) tools. The evaluation primarily focuses on key performance metrics, specifically sub-threshold slope and ON current, to comprehensively assess the effectiveness of the Double Gate TFET.