Optimization of Forksheet and Nanosheet Transistors Through Parametric Simulations and Machine Learning for High-Performance Semiconductor Applications
Parametric simulations enhance performance and stability of nanosheet and forksheet transistors, indicating potential for advanced semiconductor design.
Key Points
Nanosheet transistors significantly improve switching speeds compared to forksheet transistors while maintaining stable voltage characteristics.
Parametric simulations revealed lower modeling errors in nanosheet transistors, especially in compact configurations.
Forksheet transistors showed better voltage stability in larger dimensions, making them preferable for reliability-focused applications.
Machine learning models achieved a 94% accuracy rate in predicting transistor behavior, streamlining the design process.