This research identifies the mechanism behind subthreshold swing degradation and saturation in cryogenic gate-all-around MOSFETs, suggesting implications for device performance.
We investigate the physical mechanism linking subthreshold swing (SS) degradation and SS saturation in cryogenic n-type gate-all-around MOSFETs. While previous studies attributed SS saturation to source-to-drain direct tunneling (SDDT), we clarify that SDDT alone does not necessarily cause saturation. To the best of our knowledge, this study is the first to systematically establish that SS degradation arises when the drain current is dominated by Fermi-level-pinned tunneling that is insensitive to gate modulation in the deep subthreshold regime, and that SS saturation occurs only when this degradation overlaps with the current range relevant to device operation. Moreover, our results indicate that SS degradation can, under certain conditions, not only lead to saturation but also cause a direct increase in SS, making its impact even more critical for aggressively scaled devices. Using quantum transport NEGF simulations with a GAA MOSFET structure, we accurately analyze tunneling effects and suggest that the underlying physical mechanism is not limited to this specific device geometry. These findings provide a unified understanding of SS degradation and saturation for cryogenic CMOS technologies.
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Lee et al. (2025) studied this question.
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