ISE-based controller design for interval systems using the Jaya algorithm with model order reduction

This manuscript proposes a novel technique for designing controllers for high-order interval systems using reduced-order modelling. The proposed method begins by converting the high-order interval system into a reduced-order model. The reduced order denominator is evaluated using Routh table truncation, while the numerator is computed through a time moment matching technique. A PID controller is then designed for the least stable rational system of the reduced order model, utilizing ISE minimization and the Jaya optimization algorithm. The designed controller is subsequently implemented on the high-order system. To demonstrate the simplicity and effectiveness of the method, an illustrative example is provided. The step response of the original system and the reduced-order model with the controller is shown and compared, highlighting the superior performance of the proposed method. Additionally, the gain margin and phase margin of the system and the reduced-order model with the controller are compared, further validating the efficacy of the proposed technique.