Reshaping WiFi ISAC with High-Coherence Hardware Capabilities

This is the authors' abstract. We don't add key points for this paper.

WiFi shows great promise for integrated sensing and communication (ISAC), but its wider application is hampered by two pivotal challenges: the low-quality channel state information (CSI) and inadequate hardware capabilities. This article introduces a paradigm shift with high-coherence hardware capabilities to fundamentally overcome these two challenges. Our approach is realized through four key break-throughs. First, we uncover a novel category of CSI error sources, termed CODEs, which pose core challenges for WiFi ISAC. The CODEs stem from the WiFi hardware design, and addressing them requires hardware-level modifications. Then, we propose a list of high-coherence hardware capabilities aimed at eliminating these errors. Our analysis indicates that the majority of these capabilities can be implemented at the firmware level, with a minority requiring chip-level changes. Next, we introduce two robust and synergistic incentives to encourage vendors to integrate these capabilities into their hardware: the 802.11bf standard and its certification program, and the large-scale carrier-grade purchasing. Finally, we present two demonstrations: a sub-nanosecond level time-of-flight (ToF) estimation system and a WiFi-based phased array. Both demonstrations show that remarkable sensing precision is achievable with the proposed high-coherence capabilities.