Influence of Active Area Etching Method on the Integrity of Gate Oxide on 4H-SiC

Etching active area by dry etching method can precisely control the length and width of the devices, but it may damage the SiC surface. In this paper, we fabricated metal-oxide-semiconductor capacitors (MOSC) using different etching methods to compare the effect of etching methods on the SiO 2 /SiC interface and dielectric breakdown. It is observed that dry etching will degrade the surface roughness of SiC and the interface state density at the SiO 2 /SiC interface. Post-oxidation NO annealing cannot passivate the interface effectively. The breakdown field of gate oxide on the dry etched sample is also degraded. These results indicate that dry etching of SiC surface should be avoided when fabricating MOS devices.